{"id":1497,"date":"2025-12-09T05:40:49","date_gmt":"2025-12-09T05:40:49","guid":{"rendered":"https:\/\/fljpcb.com\/?p=1497"},"modified":"2025-12-09T06:03:22","modified_gmt":"2025-12-09T06:03:22","slug":"signal-integrity-design-and-pcb-test-methods","status":"publish","type":"post","link":"https:\/\/fljpcb.com\/nl\/signal-integrity-design-and-pcb-test-methods\/","title":{"rendered":"Signal Integrity Design and PCB Test Methods"},"content":{"rendered":"<p>Signal integrity design is an important part of <a href=\"https:\/\/fljpcb.com\/nl\/solutions\/case-studies\/\">PCB design.<\/a> There are many test methods today. Broadly, they fall into three groups:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Frequency-domain tests<\/li>\n\n\n\n<li>Time-domain tests<\/li>\n\n\n\n<li>Other tests<\/li>\n<\/ul>\n\n\n\n<p>Not every method fits every case, and many types of instruments are needed. Know the features of each test method, then pick the right method for the object you test. That choice will make verification faster and more reliable.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-time-domain-tests\">Time-domain tests<\/h2>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-1-waveform-testing\">1. Waveform testing<\/h3>\n\n\n\n<p>Waveform testing is the most basic signal integrity test. People usually use an oscilloscope. You check waveform amplitude, spikes, edges, and so on. By looking at waveform features you can tell if amplitude, edge time, and other measures meet the spec. Waveform testing must follow some rules so test error stays small.<\/p>\n\n\n\n<p>First, the scope and probe together must have enough bandwidth. The test system bandwidth on the board should be more than three times the test signal bandwidth. In practice, some engineers pick probes at random and mix probes and scopes from different makers. That mismatch can make large errors in the test system.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img fetchpriority=\"high\" decoding=\"async\" width=\"479\" height=\"500\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Waveform-testing.webp\" alt=\"Waveform testing\" class=\"wp-image-1506\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Waveform-testing.webp 479w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Waveform-testing-287x300.webp 287w\" sizes=\"(max-width: 479px) 100vw, 479px\" \/><\/figure>\n\n\n\n<p>Second, pay attention to small details. Choose a test point near the receiver. If you cannot probe there, for a BGA part probe a PCB trace or a via close to the pin. If the probe point is far from the receiver pin, the measured signal can differ a lot from the real signal seen by the device. Also keep the probe ground lead as short as possible.<\/p>\n\n\n\n<p>Finally, think about matching. This matters when you use coax cables. The coax into the scope usually ends in a 50 \u03a9 DC-coupled load. Some circuits need a DC bias. If you connect the test system directly, you may change the circuit\u2019s working state and fail to see the correct waveform.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-2-eye-diagram-testing\">2. Eye diagram testing<\/h3>\n\n\n\n<p>Eye diagram testing is a common method for interfaces with formal specs, like USB, SATA, HDMI, and optical links.<\/p>\n\n\n\n<p>You test these interfaces with a scope that supports an eye mask. This can be a general oscilloscope, a sampling scope, or a signal analyzer. These instruments usually have a clock recovery function to build the eye diagram.<\/p>\n\n\n\n<p>If the instrument has no built-in mask or clock recovery, you must use an external clock to trigger.<\/p>\n\n\n\n<p>When you use eye tests, pay attention to how many waveforms you collect. For spec checks, a small sample underestimates jitter. A normal rule is to collect about 3,000 waveforms for a good eye measurement.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img decoding=\"async\" width=\"600\" height=\"304\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Eye-diagram-testing.webp\" alt=\"Eye diagram testing\" class=\"wp-image-1499\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Eye-diagram-testing.webp 600w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Eye-diagram-testing-300x152.webp 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/figure>\n\n\n\n<p>Some tools use analysis software that can show detailed eye results. The software can reveal where sample points enter the mask, which you might not see on a simple display. All sample points add up, so the display looks like a long persistence image.<\/p>\n\n\n\n<p>Newer instruments use long memory storage. They store collected waveforms and let you post-process them. This way each tiny detail remains available and you can find rare anomalies. It helps engineers see whether a pattern is, for example, 10011 or 01001. That feature helps find and fix problems fast.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-3-jitter-testing\">3. Jitter testing<\/h3>\n\n\n\n<p>Jitter testing is getting more attention. Dedicated jitter analyzers such as a TIA (time-interval analyzer) or specialized instruments like the SIA3000 are costly and used less often.<\/p>\n\n\n\n<p>Most labs use an oscilloscope plus software for jitter analysis, for example Keysight\u2019s EZJIT software. The software can separate different jitter components, for example RJ (random jitter) and DJ (deterministic jitter), and further split DJ into its parts.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img decoding=\"async\" width=\"600\" height=\"240\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Jitter-testing.webp\" alt=\"\" class=\"wp-image-1500\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Jitter-testing.webp 600w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Jitter-testing-300x120.webp 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/figure>\n\n\n\n<p>For such tests, the scope should have long record length and very high sampling rate. A memory of 2M points or more and 20 GSa\/s sampling rate are common minimal needs.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-4-tdr-testing\">4. TDR testing<\/h3>\n\n\n\n<p><a href=\"https:\/\/www.polarinstruments.com\/support\/cits\/TBA_article.pdf\">TDR (time-domain reflectometry)<\/a> is used mainly to test PCB traces and device impedance. It works for single-ended traces, differential pairs, connectors, and cables. The test must match the actual application.<\/p>\n\n\n\n<p>For example, if your signal rise time in the real system is about 550 ps, then set the TDR pulse edge close to 550 ps. Do not use a 50 ps edge if the real system edge is 550 ps. A mismatch between test pulse and real pulse can give large differences from real behavior.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"333\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/TDR-Test.webp\" alt=\"TDR Test\" class=\"wp-image-1503\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/TDR-Test.webp 600w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/TDR-Test-300x167.webp 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/figure>\n\n\n\n<p>Factors that affect TDR accuracy include read point choice, reflections, and calibration. Reflections can make short PCB trace results very wrong. This is most clear when using a probe tip (TIP) to test, because the TIP contact causes large local impedance changes and strong reflections. Those reflections cause the nearby impedance curve to wobble and produce misleading readings.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-5-timing-tests\">5. Timing tests<\/h3>\n\n\n\n<p>Device speeds keep rising and timing margins shrink. Timing failures cause product instability, so timing tests are very important.<\/p>\n\n\n\n<p>Timing tests often need a multi-channel scope and probes. Use pattern or state triggers or logic triggers on the scope to quickly capture the target waveform.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"355\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Timing-tests.webp\" alt=\"Timing tests\" class=\"wp-image-1504\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Timing-tests.webp 600w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Timing-tests-300x178.webp 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/figure>\n\n\n\n<p>Logic analyzers are not often used for strict timing tests. They are mainly for code analysis \u2014 to see which digital pattern runs on a bus and to match it with software. For low-demand uses, a logic analyzer can be used. Compared to a scope, a logic analyzer has more channels but its probes are harder to attach and setup takes more steps.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-6-bit-error-rate-ber-testing\">6. Bit error rate (BER) testing<\/h3>\n\n\n\n<p>BER testing is usually a system-level test done with a bit error tester or by software on two PCs. BER tests check each bit over time. Compared to scopes that sample in time, BER test systems measure continuously and catch rare errors. For low BER rates, tests can take a long time \u2014 sometimes a day or several days.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"357\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Bit-error-rate-BER-testing.webp\" alt=\"\" class=\"wp-image-1498\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Bit-error-rate-BER-testing.webp 600w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Bit-error-rate-BER-testing-300x179.webp 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-frequency-domain-tests\">Frequency-domain tests<\/h2>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-7-spectrum-testing\">7. Spectrum testing<\/h3>\n\n\n\n<p>In early design, spectrum tests are rare. Later, for system tests such as EMC, many products must go through these tests. Use spectrum analysis to find frequency points that exceed limits. A near-field scanner with a spectrum analyzer can find which board areas radiate too much.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"440\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Spectrum-testing.webp\" alt=\"Spectrum testing\" class=\"wp-image-1502\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Spectrum-testing.webp 600w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Spectrum-testing-300x220.webp 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/figure>\n\n\n\n<p>These devices are expensive and not every lab has them. So in normal work, engineers try to do good matching and shielding in the design phase to avoid EMC failures later.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-8-frequency-domain-impedance-testing\">8. Frequency-domain impedance testing<\/h3>\n\n\n\n<p>Many standard interfaces require good impedance match so reflections stay low. In microwave or RF work, impedance has strict needs.<\/p>\n\n\n\n<p>Do frequency-domain impedance tests with a network analyzer. For differential ports the setup is more complex. You often need a balun to transform differential to single-ended, or you use a multi-port network analyzer.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-9-transmission-loss-testing\">9. Transmission loss testing<\/h3>\n\n\n\n<p>Transmission loss testing targets long board traces or cables, or any case of long-distance high-speed signals. It also helps find frequency-domain crosstalk. Use a network analyzer for these tests. For differential signals or twisted pairs, use a balun or a 4-port network analyzer.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"272\" src=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Transmission-loss-testing.webp\" alt=\"Transmission loss testing\" class=\"wp-image-1505\" srcset=\"https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Transmission-loss-testing.webp 600w, https:\/\/fljpcb.com\/wp-content\/uploads\/2025\/12\/Transmission-loss-testing-300x136.webp 300w\" sizes=\"(max-width: 600px) 100vw, 600px\" \/><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-other-tests\">Other tests<\/h2>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-practical-choices-and-instruments\">Practical choices and instruments<\/h2>\n\n\n\n<p>In engineering, choose test methods by the object under test and the needs. Some cases call for interface tests such as eye tests, impedance or BER tests. Other simpler boards may use waveform or timing tests. For high-speed designs, use TDR for trace impedance and jitter tests for serial clocks and high-speed serial data.<\/p>\n\n\n\n<p>Many instruments can do several tests. For example, modern oscilloscopes can do timing, waveform, eye, and jitter analysis with software. Network analyzers handle frequency-domain impedance and transmission loss. Use a mix of tools and flexible analysis to improve test efficiency and catch design issues early.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Design scenarios &amp; usage recommendations<\/h3>\n\n\n\n<p>Below are practical scenarios and the recommended test methods. Use these as guidance when planning tests.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Simple digital board, low speed (&lt;100 MHz)<\/strong>\n<ul class=\"wp-block-list\">\n<li>Use: waveform testing, timing tests<\/li>\n\n\n\n<li>Instruments: general oscilloscope (100 MHz+), logic analyzer for multi-channel checks<\/li>\n\n\n\n<li>Why: low-speed signals rarely need TDR or advanced jitter tests.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>Medium-speed digital (100 MHz \u2013 1 GHz)<\/strong>\n<ul class=\"wp-block-list\">\n<li>Use: waveform, eye for interfaces (if applicable), timing, selective TDR<\/li>\n\n\n\n<li>Instruments: oscilloscope (1\u20134 GHz BW), sampling for serial links, TDR for critical traces<\/li>\n\n\n\n<li>Why: edges and reflections become more relevant; verify impedance and timing margins.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>High-speed serial links (>=1 Gbps, e.g., USB3\/PCIe\/SerDes)<\/strong>\n<ul class=\"wp-block-list\">\n<li>Use: eye diagram, jitter decomposition, TDR, BER (system test), frequency-domain loss<\/li>\n\n\n\n<li>Instruments: high-speed oscilloscope (20+ GSa\/s, deep memory), BERT, network analyzer<\/li>\n\n\n\n<li>Why: both time and frequency domain behaviors are critical for link margin and reliability.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>Very high-speed \/ RF \/ microwave<\/strong>\n<ul class=\"wp-block-list\">\n<li>Use: frequency-domain impedance, S-parameters, transmission loss, EMC pre-scan<\/li>\n\n\n\n<li>Instruments: vector network analyzer (VNA), spectrum analyzer, baluns<\/li>\n\n\n\n<li>Why: full frequency response, matching, and radiation need to be characterized.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>Long transmission lines or cables<\/strong>\n<ul class=\"wp-block-list\">\n<li>Use: transmission loss, TDR, VNA S21\/S11<\/li>\n\n\n\n<li>Instruments: VNA, TDR<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>EMC-sensitive designs<\/strong>\n<ul class=\"wp-block-list\">\n<li>Use: near-field spectrum, pre-compliance scans, layout mitigation<\/li>\n\n\n\n<li>Instruments: spectrum analyzer with near-field probe set<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">Test comparisons (quick table)<\/h3>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><tbody><tr><th>Test<\/th><th>Main use<\/th><th>Strengths<\/th><th>Limitations<\/th><th>Typical instruments<\/th><\/tr><tr><td>Waveform<\/td><td>Basic signal shape &amp; edges<\/td><td>Simple, direct<\/td><td>Limited statistical view<\/td><td>Oscilloscope<\/td><\/tr><tr><td>Eye diagram<\/td><td>Link margin for serial interfaces<\/td><td>Shows overall link behavior<\/td><td>Needs long captures, masks<\/td><td>Oscilloscope with clock recovery \/ sampling scope<\/td><\/tr><tr><td>Jitter<\/td><td>Decompose timing noise<\/td><td>Shows RJ\/DJ and sources<\/td><td>Requires high-sampling &amp; memory<\/td><td>Scope + jitter software \/ TIA<\/td><\/tr><tr><td>TDR<\/td><td>Impedance &amp; discontinuity<\/td><td>Direct view of impedance<\/td><td>Probe reflections can skew<\/td><td>TDR, TDR scope<\/td><\/tr><tr><td>Timing<\/td><td>Multi-channel timing margin<\/td><td>Captures setup\/hold issues<\/td><td>Requires many channels<\/td><td>Multi-channel oscilloscope<\/td><\/tr><tr><td>Spectrum<\/td><td>EMC &amp; emissions<\/td><td>Finds radiating sources<\/td><td>Near-field scan equipment needed<\/td><td>Spectrum analyzer + near-field probe<\/td><\/tr><tr><td>Frequency impedance<\/td><td>RF matching<\/td><td>Full freq response<\/td><td>Complex setup for diff ports<\/td><td>VNA<\/td><\/tr><tr><td>Transmission loss<\/td><td>Long line loss vs freq<\/td><td>Real loss curves<\/td><td>Need good calibration<\/td><td>VNA<\/td><\/tr><tr><td>BER<\/td><td>System bit reliability<\/td><td>Captures rare events<\/td><td>Very long test times<\/td><\/tr><\/tbody><\/table><\/figure>","protected":false},"excerpt":{"rendered":"<p>Signal integrity design is an important part of PCB design. There are many test methods today. Broadly, they fall into three groups: Not every method fits every case, and many types of instruments are needed. Know the features of each test method, then pick the right method for the object you test. That choice will [&hellip;]<\/p>","protected":false},"author":1,"featured_media":1501,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[39,64],"tags":[66,69,67,65,68,70],"class_list":["post-1497","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-pcb-design","category-signal-integrity","tag-ber-test","tag-emc-test","tag-eye-diagram","tag-pcb-testing","tag-tdr","tag-waveform-analysis"],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.3 (Yoast SEO v27.4) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Signal Integrity Design and PCB Test Methods<\/title>\n<meta name=\"description\" content=\"Complete guide to PCB signal integrity testing: waveform, eye, jitter, TDR, VNA, BER, and practical decision steps for real design scenarios.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/fljpcb.com\/nl\/signal-integrity-design-and-pcb-test-methods\/\" \/>\n<meta property=\"og:locale\" content=\"nl_NL\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Signal Integrity Design and PCB Test Methods\" \/>\n<meta property=\"og:description\" content=\"Complete guide to PCB signal integrity testing: waveform, eye, jitter, TDR, VNA, BER, and practical decision steps for real design scenarios.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/fljpcb.com\/nl\/signal-integrity-design-and-pcb-test-methods\/\" \/>\n<meta property=\"og:site_name\" content=\"Philifast - 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